fa25-cs354 cs354cachespatial-localitymemorytemporal-locality
W08 W08
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This Week
Do
Direct Mapped Caches - Restrictive
Fully Associative Caches - Unrestrictive
Set Associative Caches - Sweet!
Replacement Policies
1. Random Replacement
2. Least Recently Used (LRU)
3. Least Frequently Used (LFU)
Writing to a Cache
Write Hits
Write Misses
Typical Designs
Cache Performance
Metrics
Larger Blocks (S and E unchanged)
More Sets (B and E unchanged)
More Lines E per Set (B and S unchanged)
Intel Quad Core i7 Cache (gen 7)
Impact of Stride
Stride Misses
Example
Memory Mountain
Independent Variables
Dependent Variable
Temporal Locality Impacts
Spatial Locality Impacts