Chapter 5: The LC-3

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Chapter 5: The LC-3

The LC-3

5.1 The ISA: Overview

5.1.1 Memory Organization

5.1.2 Registers

5.1.3 The Instruction Set

5.1.4 Opcodes

5.1.5 Data Types

5.1.6 Addressing Modes

5.1.7 Condition Codes

5.2 Operate Instructions

5.2.1 ADD, AND, and NOT

5.2.2 Immediates

Example 5.2

Example 5.3

ANSWER:

5.2.3 The LEA Instruction (Although Not Really an Operate)

5.3 Data Movement Instructions

5.3.1 PC-Relative Mode

5.3.2 Indirect Mode

5.3.3 Base+offset Mode

5.3.4 An Example

5.4 Control Instructions

5.4.1 Conditional Branches

5.4.2 Two Methods of Loop Control

5.4.3 The JMP Instruction

5.4.4 The TRAP Instruction

5.5 Another Example: Counting Occurrences of a Character

5.6 The Data Path Revisited

5.6.1 Basic Components of the Data Path

5.6.1.1 The Global Bus

5.6.1.2 Memory

5.6.1.3 The ALU and the Register File

5.6.1.4 The PC and the PCMUX

5.6.1.5 The MARMUX

5.6.2 The Instruction Cycle Specific to the LC-3

5.6.2.1 FETCH

5.6.2.2 DECODE

5.6.2.3 EVALUATE ADDRESS

5.6.2.4 OPERAND FETCH

5.6.2.5 EXECUTE

5.6.2.6 STORE RESULT

Exercises

5.57 Note boldface signal lines on the following data path.

5.58 Let’s use the unused opcode to implement a new instruction, as shown below:

Source